The present invention relates to the field of measuring propagation delay, and more particularly, to measuring such delays with circuitry embedded in semiconductor chips.
All electrical signals transmitted through a conduction path experience a propagation delay. Propagation delays generally result from properties of die conduction path such as load capacitance and signal line length.
Propagation delays at affect systems differently depending upon the nature of those systems but most systems can be affected adversely by relative propagation delay, which is the difference in propagation speeds between two paths. For example, in synchronous (clocked) circuits, differences in propagation delays between clock signals on different lines leads to clock skew, which degrades the performance of die circuit. Likewise, in high-performance, asynchronous (non-clocked) pipelines, knowing the relative propagation delay between the control and data signals is an important step in ensuring that the signals arrive in there correct order at a pipeline stage.
Therefore, accurate measurement of propagation delay on a semiconductor chip is desirable when designing and testing fabricated semiconductor chips. Conventional technologies for measuring propagation delay time typically involve on-chip probing techniques. Usually, these techniques involve physically inserting a probe at points on the chip that are to be tested.
Today""s high-speed semiconductor circuits may experience delay times in the sub-nanosecond or picosecond range. The shortness of these delay times makes accurate measurements exceedingly difficult, even with the most advanced on-chip probing techniques. There is a need, therefore, to accurately and reliably measure absolute and relative signal path propagation delay times on a semiconductor chip.
Systems and methods consistent with the present invention determine propagation delays between signal paths on a semiconductor chip using arbiter circuits within the semiconductor chip at the ends of the to-be-measured signal paths. The arbiter circuits accurately determine which of two transitions transmitted on the signal paths arrive at the arbiters first.
The advantages and purpose of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. The advantages and purpose of the invention will be realized and attained by means of the elements and combinations particularly pointed out in the appended claims.
To attain the advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, a circuit implemented on an integrated circuit is described. The circuit is used in determining propagation delay between first and second signal paths on the integrated circuit, and comprises a first and second arbiter circuit. The first arbiter circuit is coupled at its inputs to one end of the first and second signal paths, and includes mechanisms configured to determine on which of the first and second signal paths test transitions arrive first. Similarly, the second arbiter circuit is coupled at its inputs to a second end of the first and second signal paths, and includes mechanisms configured to determine on which of the first and second signal paths the test transitions arrive first.
Both the foregoing general description and the following detailed description are exemplary and explanatory only and do not restrict the invention, as claimed.